06 Mar 2020
Title: Report on Alumni Talk by Mr. Raja Jitendra Nayaka on “FPGA – Advancements,Trends, and Opportunities”
Date: 06th March 2020
Location: Aryabhata Seminar Hall, C V Raman Block.
Description: The Alumni Cell of School of ECE had organized a talk on “FPGA – Advancements, Trends, and Opportunities” on 06th March 2020 between 2:45 PM to 3:30 PM in Aryabhatta Seminar Hall, C V Raman Block.
The Resource person of the Talk was Mr. Raja Jitendra Nayaka, Senior Engineer, Core R&D, ITI, Bengaluru, India, Ministry of Communication, Government of India.
Around 60 students from the School of ECE attended the Technical Talk which included 4th Semester, 6th Semester and M.Tech VLSI.
The Talk focused on the following key points:
• Awareness on the present FPGA Technological development and its importance
• Strength of FPGA and its development tools in the present scenario.
• Awareness about gap analysis linked to Digital Technology Development
• Market size and Job opportunities in the FPGA domain.
We would like to thank our beloved Chancellor, Dr. P. Shyama Raju sir for providing all facilities and support to conduct this programme. We also thank Vice Chancellor Dr. S. Y. Kulkarni sir, Advisor Dr. V G Talawar sir, Registrar Dr M. Dhanamjaya sir, and Dean-Training, Placement and Planning, Dr N. Ramesh sir, for their motivation, help and support to conduct Alumni technical talk.
We also thank our Director, School of ECE, Dr. R C. Biradar, for his constant support and always motivating us to organize such events in School of ECE.
We also thank all the Faculty members, Technical staff of School of ECE for their kind support and coordination in organizing the Alumni Technical Talk successfully