Hands on Training on System on Chip architecture design and analysis
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Hands on Training on System on Chip architecture design and analysis

1st Sep, 2018, 10:00 am - 5:00 pm

Hands-on Training on System-on-Chip Architecture Design and Analysis using SystemC/TLM2.0 and open source SoC Simulator

The School of ECE is organizing "Hands-on Training on System-on-Chip architecture design and analysis using SystemC/TLM2.0 and open source SoC simulator", conducted by an external expert who is Senior Staff Member, Qualcomm Ltd. from 1st September, 2018. He will be taking 2 hours session in every weekend (all Saturdays) and the workshop will proceed for 6 months (total 48 hours).

Open Source SoC is a highly demanding area in the semiconductor industry and the structure of the training module is at par with the industry requirement and the prospective applicants will have a fruitful chance of getting trained by the industry expert on the Saturdays.

 

Pre-requisite:
The knowledge of digital logic design fundamentals and computer architecture.

 

Date and Schedule:
Program Commences on: 01/09/2018 (Weekends : Saturdays)
Program Duration: 6 months
Schedule: 10.30 am to 12.30 pm

 

Registration details:
Registration Fees particulars:
Participants from REVA University : 12,000/-
Participants from other educational institutions : 14,000/-
Participants from the Industry: 25,000/-.
Limited Seats: 40

 

Course Co-ordinator and Point of Contact:
Dr. Parag Parandkar, Associate Professor, School of ECE, (M): 8839580211
Email: paragparandkar@reva.edu.in
Dr. M. Devanathan, Assistant Professor, School of ECE, (M): 7418332829
Email: devanathan.m@reva.edu.in

Lastet ECE News

Date:
1st Sep, 2018
Venue:
REVA University, Benguluru

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